The present invention relates to a semiconductor device simulating apparatus that is used in a program debugging apparatus for checking a test program by emulating a semiconductor test apparatus, as well as to a semiconductor test program debugging apparatus using such a semiconductor device simulating apparatus.
Semiconductor test apparatuses are known that perform a DC test, a function test, etc. on various semiconductor devices such as logic ICs and semiconductor memories before shipment. The tests that are performed by semiconductor test apparatuses are generally classified into the function test and the DC test. In a function test, a prescribed test pattern signal is applied to a semiconductor device to be tested (hereinafter referred to as xe2x80x9cDUTxe2x80x9d) and it is checked whether the DUT performs an expected operation for the test pattern signal. In a DC test, it is checked whether DC characteristics obtained at each terminal of a DUT are expected ones. Among the DC tests for example, there are voltage-application current-measurement tests which test whether an expected current can be output from a terminal when a known voltage is applied, and current source voltage measurement tests which test whether an expected voltage appears at a terminal when a known current is input or output. In case of function tests, in many cases, voltage conditions, current conditions, etc. that are applied to a DUT are changed in various manners such as changing a high-level-state voltage to 4 V that is lower than a regular voltage value of 5 V, for example, and changing a low-level-state voltage to 0.5 V that is higher than a regular voltage value of 0 V, for example.
In conducting a function test or a DC test, various conditions, that is, tests of what items are to be performed under what conditions are incorporated in advance in a semiconductor test program. Therefore, various tests can be performed on a DUT by running such a semiconductor test program. However, a semiconductor test program includes an enormous number of steps because it is required to control a wide variety of operations such as setting of test items, setting of test conditions, execution of a test, and judgment of a test result. When the kind of a DUT or its logic is changed, it is necessary to alter a semiconductor test program accordingly in various manners. When a semiconductor test program is newly generated or altered, it is necessary to evaluate it, that is, to check whether the program itself operates normally. One method is such that a semiconductor test program is evaluated by running it for a DUT that is known to be good or defective by using an actual semiconductor test apparatus. However, semiconductor test apparatuses themselves are expensive and are introduced in a small number. Therefore, testing whether a semiconductor test program operates normally by using an actual semiconductor test apparatus requires that operation of a semiconductor test line be stopped and hence is not preferable. In view of the above, conventionally, instead of evaluating a semiconductor test program by using an actual semiconductor test apparatus, whether the semiconductor test program operates normally is checked by emulating the semiconductor test apparatus by using a general-purpose computer such as a workstation.
For example, Japanese Patent Laid-Open No. 9-185519 discloses a technique in which a semiconductor test apparatus is emulated. This publication relates to a debugging apparatus for testing whether a semiconductor test program operates normally. This debugging apparatus configures an emulated semiconductor test apparatus by running a semiconductor test program to be debugged under the operating system of a general-purpose computer. A simulatory function test or DC test is conducted by connecting an virtual subject device section, test condition setting section, test item setting section, test result storage section, etc. to the emulated semiconductor test apparatus via an interface section and reading virtual data that are set in the virtual subject device section in accordance with test conditions that are set in the test condition setting section.
In the above debugging apparatus, instead of using an actual DUT, virtual data that are set in advance in the virtual subject device section are read into the emulated semiconductor test apparatus via the interface section in accordance with test conditions that are set in the test condition setting section. Judgments xe2x80x9cpassxe2x80x9d and xe2x80x9cfailxe2x80x9d are made when the virtual data are within or out of a range corresponding to the test conditions. As such, unlike the case of a DC test using an actual semiconductor test apparatus, the conventional virtual subject device section does not reflect operation of an actual DUT such as a value variation that depends on the internal resistance of a DUT that may occur when a voltage-application current-measurement test or a current-application voltage-measurement test is performed on a measurement subject pin (evaluation subject pin) of the actual DUT. That is, the conventional debugging apparatus merely reads virtual data that are set in advance in the virtual subject device section irrespective of the internal resistance of a DUT, and hence does not properly simulate the operation of the actual DUT.
There is another problem that when it is intended to debug a semiconductor test program by using such a virtual subject device section, part of it cannot be debugged sufficiently for the following reason. To judge the logical value of a signal, it is necessary to set high-level and low-level threshold values at proper values in consideration of a voltage variation due to the internal resistance of a DUT. However, the conventional debugging apparatus cannot judge whether threshold values that are set in a semiconductor device test program are appropriate because a voltage variation due to the internal resistance of a DUT is not taken into consideration.
The present invention has been made to in view of the above respects, and an object of the invention is therefore to provide a semiconductor device simulating apparatus capable of properly simulating and outputting a voltage value or a current value that varies depending on an internal resistance as in an actual DUT.
Another object of the invention is to provide a semiconductor test program semiconductor test program debugging apparatus capable of properly checking the contents of a semiconductor test program even in a case of using a virtual semiconductor device (hereinafter described as xe2x80x9cdevice modelxe2x80x9d) in the same manner as in a case where the semiconductor test program is run for an actual DUT.
According to an aspect of the invention, a semiconductor device simulating apparatus comprises parameter setting unit for setting various parameters to be used for measuring a current value or a voltage value that varies depending on an internal resistance of a DUT; input unit for inputting a test signal for the DUT; and simulating unit for simulating and outputting a current value or a voltage value that varies depending on the internal resistance of the DUT in accordance with the parameters and the test signal.
In general, a current value or a voltage value that is measured from a signal pin of a DUT varies depending on an internal resistance of the DUT. Therefore, by simulating a current value or a voltage value of a DUT with the simulating unit after setting, with the parameter setting unit, various parameters that are necessary for such a measurement, a current value or a voltage value that varies depending on an internal resistance can properly be simulated and output in the same manner as in the case of measuring an actual DUT.
In particular, it is desirable that the various parameters that are set by the parameter setting unit include a first parameter indicating a voltage value and a resistance value in a case where a signal pin of a DUT is in a high-level state, a second parameter indicating a voltage value and a resistance value in a case where the signal pin is in a low-level state, a third parameter indicating a resistance value in a case where the signal pin is in a high-impedance state, a fourth parameter indicating which of the high-level state, low-level state, and the high-impedance state the signal pin is in, and a fifth parameter indicating a current value or a voltage value to be applied to the signal pin in a current source voltage measurement or a voltage source current measurement. Further, it is desirable that the above described simulating unit simulates a voltage value that would appear at each signal pin of the DUT in the current source voltage measurement or a current value that would appear at each signal pin of the DUT in the voltage source current measurement based on these first to fifth parameters and the test signal.
When a voltage source current measurement or a current source voltage measurement is performed by applying a prescribed voltage or current in a case where a signal pin is in a high-level state, the fourth parameter indicates that a high-level state is established. Therefore, the simulating unit outputs a current value or a voltage value corresponding to the signal pin based on the voltage value and the resistance value that are indicated by the first parameter and the application voltage value or current value that is indicated by the fifth parameter. When applying a prescribed voltage or current in a case where the signal pin is in a low-level state performs a voltage source current measurement or a current source voltage measurement, the fourth parameter indicates that a low-level state is established. Therefore, the simulating unit outputs a current value or a voltage value corresponding to the signal pin based on the voltage value and the resistance value that are indicated by the second parameter and the application voltage value or current value that is indicated by the fifth parameter. When applying a prescribed voltage or current in a case where the signal pin is in a high-impedance state performs a voltage source current measurement or a current source voltage measurement, the fourth parameter indicates that a high-impedance state is established. Therefore, the simulating unit outputs a current value or a voltage value corresponding to the signal pin based on the resistance value that are indicated by the third parameter and the application voltage value or current value that is indicated by the fifth parameter. Since in this manner the various parameters are set so as to conform to a current source voltage measurement or a voltage source current measurement, a voltage value or a current value that varies depending on an internal resistance can properly be simulated and output in the same manner as in the case of measuring an actual DUT.
In particular, it is desirable that the various parameters that are set by the above described parameter setting unit include a sixth parameter indicating a resistance value corresponding to a power source pin of a DUT and a seventh parameter indicating a current value or a voltage value to be applied to the power source pin. In this case, it is desirable that the above described simulating unit simulates a voltage value that would appear at the power source pin in a current source voltage measurement or a current value that would appear at the power source pin in a voltage source current measurement based on the sixth and seventh parameters and the test signal.
When a voltage source current measurement or a current source voltage measurement is performed by applying a prescribed voltage or current to a power source pin, a current value or a voltage value corresponding to the power source pin is properly simulated and output from the simulating unit based on the resistance value indicated by the sixth parameter and the application voltage value or current value indicated by the seventh parameter.
In particular, it is desirable that the various parameters that are set by the above described parameter setting unit include a first parameter indicating a voltage value and a resistance value in a case where a signal pin of a DUT is in a high-level state, a second parameter indicating a voltage value and a resistance value in a case where the signal pin is in a low-level state, a third parameter indicating a resistance value in a case where the signal pin is in a high-impedance state, and a fourth parameter indicating which of the high-level state, low-level state, and the high-impedance state the signal pin is in. In this case, it is desirable that the test signal that is input by the input unit indicates a condition relating to a load that is to be connected to the signal pin.
In a case where a signal pin of a DUT is in a high-level state and the load condition is no load, the fourth parameter indicated that a high-level state is established. Therefore, the simulating unit outputs a voltage value corresponding to the signal pin based on the voltage value and the resistance value indicated by the first parameter and a test signal indicating a no-load condition. In a case where the signal pin is in a low-level state and the load condition is no load, the fourth parameter indicated that a low-level state is established. Therefore, the simulating unit outputs a voltage value corresponding to the signal pin based on the voltage value and the resistance value indicated by the second parameter and the test signal indicating a no-load condition. In a case where the signal pin is in a high-impedance state and the load condition is no load, the fourth parameter indicated that a high-impedance state is established. Therefore, the simulating unit outputs a voltage value corresponding to the signal pin based on the resistance value indicated by the third parameter and the test signal indicating a no-load condition. Similarly, in other cases such as a case where the load condition is an ideal voltage source and a terminating resistor or a programmable load with an ideal current source, the simulating unit outputs a voltage value based on such a load condition. By taking the load condition into consideration in this manner, a voltage value or a current value that varies depending on an internal resistance can properly be simulated and output in the same manner as in the case of measuring an actual DUT.
According to another aspect of the invention, a semiconductor test program debugging apparatus comprises tester emulating unit for setting various parameters to be used for measuring a current value or a voltage value that varies depending on an internal resistance of a DUT, and for emulating an operation of a semiconductor test apparatus by generating a simulatory test signal to be applied to the DUT based on a semiconductor test program; device simulating unit receiving the parameters and the test signal, for simulating and outputting a current value or a voltage value that varies depending on an internal resistance of the DUT in accordance with the parameters and the test signal; and debugging unit for debugging the semiconductor test program based on an output of the device simulating unit.
The device simulating unit corresponds to the above-described semiconductor device simulating apparatus. That is, the semiconductor test program debugging apparatus according to the invention is formed by using the above-described semiconductor device simulating apparatus. Therefore, the device simulating unit properly simulates an operation of a DUT by taking into consideration a voltage variation due to an internal resistance of the DUT. This makes it possible to conduct tests that cannot be performed conventionally such as a test as to whether high-level and low-level threshold values that are described in a semiconductor test program are appropriate. As a result, the accuracy of debugging of a semiconductor test program can be increased.